How Can We Make Nanoscale Capacitors Even Smaller?
By modeling a material?s nanoscale behavior, researchers at the University of California, Santa Barbara, have pinpointed a performance-limiting layer vital in electronic devices. Their findings, published in the 12 October issue of Nature, could play a significant role in removing a major roadblock on the path toward scaled-down electronics.
With the miniaturization of all things electronic, scientists must devise strategies to shrink the components housed in a device’s circuitry. Despite their diminutive dimensions, these components must either retain or ideally, surpass the properties of their larger counterparts. One of the most commonly used components in integrated circuits is the capacitor, which serves to store energy in a device, like a battery. Made of two conductive metallic sheets separated by an insulating layer, a capacitor is typically the largest component in a circuit, and for decades, researchers have struggled with reducing its dimensions. Materials with high permittivity—a material’s ability to “permit” an electric field to flow—were thought to provide high capacitance in a nanoscale device. But expectation has yet to match reality, as experimentally measured capacitance values are orders of magnitude lower than predicted.
The proposed origin of this problem, coined the dielectric “dead layer,” is a low-permittivity sliver of material at the capacitor’s metal-insulator interface that stops charge in its tracks. What’s more, the inability to find a suitable capacitor material has hindered the performance of nanoscale devices, limiting their applications. Experimental scientists have debated the existence of such a layer, along with the mechanisms responsible for its undesirable properties, until now.
“For the first time, we can perform quantum mechanical calculations to study the metal-insulator interface,” said Nicola Spaldin, professor of materials at the University of California, Santa Barbara. “We have shown that there is indeed an intrinsic dielectric dead layer.”
Spaldin and postdoctoral scholar Massimiliano Stengel used calculations based on first principles, which consider the effects of quantum mechanics, to study the behavior of nanosized capacitor thin films. The researchers modeled the electronic behavior at the metal-insulator interface of a typical capacitor. Their calculations show that the metal electrode material tries unsuccessfully to cancel out the surface charge on the dielectric; complete cancellation would eliminate the “dead layer” effect. When the pair repeated their calculations with different electrode materials, the effect varied by a factor of four, with metallic platinum having the smallest dead layer.
“I was surprised at the magnitude of suppression at the interface,” Spaldin said. “We weren’t expecting something quite so dramatic.”
The results of these calculations can serve as guidelines for experimental researchers, and could minimize the impact of the “dead layer” in a range of thin film systems. Spaldin said she hopes her findings will encourage experimentalists to focus on platinum interfaces; in the meantime, her group has moved on to tackle interfaces in magnetic materials.“We can now reconcile experimental findings with calculations,” Spaldin said. “The next step is to make the real life interfaces as perfect as those in our models!”
Massimiliano Stengel and Nicola A. Spaldin, Nature, 443, 679, 12 October (2006)